PCI Express core bandwidth?

tors nov 12, 2009 (Rolf)

Get the VHDL source code for our PCI Express core for FPGA. And read why we think it’s the best thing you can do, when designing PCIe (PCI Express) into FPGA.

Yes, this post is in English, as we have a lot of international interest for this subject.

So how fast is this this core? More or less as fast as it can be – see the proof below, where the DMA engine option is used to do some fast data transfers to and from the PCI Express core.

The mainboard used for testing has maximum payload size = 128 bytes

DMA read 1 kByte payload

A total of 8 memory read request is sent to the root. The DMA can hold 4 outstanding requests.

PCI Express DMA read speedAfter initial latency packet number 3, 4, 5 and 6 is received from PHY from 248 to 556 cycles later.

The mean payload data rate is then:
(128 byte * 8 bit * 4 packets * 125 Mhz) / (556 – 248) = 1.66 Gbit/s ~197 MByte/s

If packet headers and 8/10 bit encoding is included the used bandwidth for received data for one packet on the serial lane can be calculated as:
(128 byte + 3 * 4 byte TLP header + 4 byte CRC + 4 byte PHY header) * 10 = 1480 bit

Thus the serial data rate used for received packets is: 4 * 1480 bit * 125 Mhz /(556 – 248) = 2.40 Gbit/s

Pretty close to the theoretical max.

DMA write 1 kByte payload

A total of 8 memory write request is sent to the root.

PCI Express core DMA write

After initial latency packet number 3, 4, 5 and 6 is sent to PHY from 216 to 556 cycles later.

The mean payload data rate is then:
(128 byte * 8 bit * 4 packets * 125 Mhz) / (556 – 216) = 1.50 Gbit/s ~178 MByte/s

The write speed is limited by the receive end buffer capacity and the core handling of credits. The core does not include waiting for credits so the DMA will not start sending a packet until
credits are available. This creates a latency of 1 packet transfer to the core after credits becomes available.

Again pretty close to the theoretical max.

PCI Express core speed

As can be seen from the above, the speed of the core – when using the very convenient DMA interface option (more about that some other time) – is as fast as can be. At roughly 200 MByte/s, the speed of a single lane PCI Express core is almost 2x the speed of plain old PCI/32 bit/33 MHz.

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